Dear Sir,
Greetings of the Day!!!!
I would like to request you to review the schematic design of DA14582 Bluetooth SoC .In datasheet of DA14582, I got confused with table no 3 which shows SPI IO pin assignment during codec operation,So kindly review the schematic and give me confirmation for the same.
If any changes are required related to MIC interface ,JTAG and SPI+ interface,then do the needful and your comments will be vital for our end product.
Kindly see the attached schematic design of DA14582 in PDF format.
Looking forward for your positive response.
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Thanks and Warm Regards,
Dinesh Vinayak Katkar,
Hardware Design Engineer,
Robota Corporation,Pune
Mob. No.- +91-9860333364
Keywords:
Device:
Hello Dinesh10097, i would suggest to contact Avnet (our distributor) locally in India. Avnet design services ADS have done many designs on our DA1458x family. If you need a contact name, please reply and i can find the right person . BR JE_Dialog
+91 080-43579999
Hi,
I would like to request you to verify the design from your side as next week we are planning for manufacturing the board,before there is need to verify from Dialog semiconductor Application Engineer.
From last one week ,I am sending mails to Avnet Engineers but no prompt response from them regarding reference design.Below are the Avnet Engineers mail id with whom I am trying to communicate ,but no response from them.
Jeware,乐--Nagesh.Jeware@avnet.com
C,Umamaheswaran--Umamaheswaran.C@avnet.com
Looking forward for your positive response regarding review of schematic design which I'm sharing once agaiin
Thanks and Regards,
Dinesh Katkar
Robota Corporation,Pune INDIA
+91-9860333364
Hello Dialog Team,
请求你请核实SPI和JTAG宾州ing in schematic file which I shared....I got confused with the table no.3 SPI assignment during codec operation in datasheet of DA14582....What does it means...during codec operation I cant use the 4 pins to other SPI or not???
Hope you are getting my doubt....
kindly see the attached schematic and Table no3 of datasheet
Hell DInesh. i will send you a separate message. Since you are requesting support that would take resource, we would need to qualify your needs. BR JE_DIalog
Hello support team
I want to raise a question about SPI communication, but I can't find where I can initiate to ask a question, I can only check the listed questions . can you tell me why? my question is: we connect 2 SPI devices on SPI bus, one is accelerator, another one is FRAM memory. and we find that when DA14580 communicate with one either device, another device must keep powered ( give power to VDD, no matter if we turn off the CS pin of the device. ), otherwise the reading/writing data will have errors when we set CLK higher than 256KHZ such as 1M or 8MHz. when the CLK is lower than 256KHz, should be ok. what cause this problem? is there any specific rules for layout the SPI bus? or any other reason?
the accelerator we use is ADXL362, FRAM is FM25V05.
and I want to know for SPI 4 pins, if I need to pullup them or pull down them in schematic? or they don't need any pullup or pull down or part of pins need them?
thanks
Hi yy,
You cant post a new question, the New topic button isn't available ? Normally you can connect several SPI peripherals on the same bus and use the CS to address them. Generally you have to keep the bus lines short especially in higher speeds. No there is no need for pull-up or pull-down, you can check the schematics on the pro board for interfacing an SPI external memory or check the AN-B-023 interfacing with external memory. There are no specific rules for operating with the SPI. Have you tried with any other SPI device to check if the issue persists ?
Thanks MT_dialog