Does DMA serve both SRC channels

I am working on the APU driver code for DA14681/SDK1.0.8 since SDK1.0.8 doesn't have the related code ready yet.
My target is to route both PMC/I2S channels:PCM1_IN1[31-8], PCM1_IN2[31-8] to both SRC channels SRC_IN1,
SRC_IN2, and then through SRC hardware output to both SRC output channels:SRC_OUT1_REG[]/SRC_OUT2_REG[],
and then route both SRC output channels:SRC_OUT1_REG[]/SRC_OUT2_REG[] to DMA channels.
I read through DA14681 Datasheet Rev. 2.1(15-July-2016) and have questions here:
1) Does DMA support both SRC channels?

from Page 95 of 460,
"20.1.1 I/O channels
The SRC block converts two 24 bits channels either as
a stereo pair or as two mono channels. The PCM linear
data pairs are received on SRC_IN and the output is
2x24 bits left aligned on SRC_OUT",
which says SRC support two channels; and from "Figure 56: Sample rate Converter block diagram", we have both channel registers:
PCM_IN1[], PCM_IN2[]/ SRC_IN1_REG[], SRC_IN2_REG[] /SRC_OUT1_REG,SRC_OUT2_REG

from Page 74 of 460, "Table 29: DMA served peripherals", it says the served peripheral includes PCM RX/TX, SRC RX/TX, but it
doesn't explicitly say Both PCM,SRC channels.

and from Page 426 of 460, "Table 756: DMA_REQ_MUX_REG (0x50003580)", it seems that only one DMA channel for SRC_TX,
so I wonder how to feed both SRC channels into one DMA channel, or it only support one SRC channel map to one DMA channel at one time.

from code "hw_dma.h"
typedef enum {
HW_DMA_TRIG_SPI_RXTX = 0x0,
HW_DMA_TRIG_SPI2_RXTX = 0x1,
HW_DMA_TRIG_UART_RXTX = 0x2,
HW_DMA_TRIG_UART2_RXTX = 0x3,
HW_DMA_TRIG_I2C_RXTX = 0x4,
HW_DMA_TRIG_I2C2_RXTX = 0x5,
HW_DMA_TRIG_USB_RXTX = 0x6,
HW_DMA_TRIG_I2S_LEFTRIGHT = 0x8,
HW_DMA_TRIG_PDM_LEFTRIGHT = 0 x9,
HW_DMA_TRIG_FTDF_RXTX = 0xA,
HW_DMA_TRIG_ECC_RXTX = 0xB,
HW_DMA_TRIG_ADC = 0xC,
HW_DMA_TRIG_NONE = 0xF
} HW_DMA_TRIG;

I2S_LEFTRIGHT, PDM_LEFTRIGHT indicates both channels, but don't know how to feed both channels into one DMA channel, and does the PDM represent
SRC as well? or only means PDM?

2) A related question, since PCM and SRC has two channels as describled above,
from page 431 of 460, " Table 767: APU_MUX_REG (0x5000401C) ",
Bit Mode Symbol Description Reset
6 R/W PDM1_MUX_IN PDM1 input mux
0 = SRC1_MUX_IN
1 = PDM input

5:3 R/W PCM1_MUX_IN PCM1 input mux
0 = off
1 = SRC1 output
2 = PCM output registers

2:0 R/W SRC1_MUX_IN SRC1 input mux
0 = off
1 = PCM output
2 = SRC1 input registers
This table is confusing to me,
1) bit 2:0, set to 1 to route PCM output to SRC input?
but from page 95 of 460, "Figure 56:Sample rate Converter block diagram", it says routing PCM_IN1/PCM_IN2 to SRC_IN,

2) bit 5:3, set to 1 to route to SRC1 output, set to 2 to route to PCM output register,
again, from page 95 of 460, "Figure 56:Sample rate Converter block diagram", it says routing SRC_OUT1 to SRC_OUT1_REG or to PCM_OUT

if my description is confusing as well, in other way, I want to implement the scenario of PCM_IN to USB:
from "Table 44: Typical SRC use cases " fr Page 96
describled. And
how do I config APU_MUX_REG to route both channel PCM_IN1_DATA--> SRC_OUT1_REG, PCM_IN2_DATA--> SRC_OUT2_REG seperately?