I2C clock streching (SCL)

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yassin.bennaceur
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I2C clock streching (SCL)

My DA14580 (slave) is attached to a host controller (master) with I2C. So the host controller keeps asking for data, then DA14850 send it via i2c ... So I want to delay the sending a little bit in case DA14580 has no data ready yet.

I though I could use the clock stretching solution for i2C but have no idea how to it ?

Any help ?

Thanks,
Yassin

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RvA
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Hi Yassin,

Hi Yassin,

The datasheet shows (p116) register I2C_INTR_STAT_REG (0x5000132C). There is a bit R_RD_REQ wit the following description:

这个位设置为1时,控制器s acting as a slave andanother I2C master is attempting to read data from the controller.The controller holds the I2C bus in a wait state(SCL=0) until this interrupt is serviced, which means that theslave has been addressed by a remote master that is askingfor data to be transferred. The processor must respond to thisinterrupt and then write the requested data to theI2C_DATA_CMD register. This bit is set to 0 just after the processorreads the I2C_CLR_RD_REQ register

Will this bring you the desired behavior?

Best regards, RvA

yassin.bennaceur
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Thanks Rva,

Thanks Rva,

I will check this out and keep you updated. From the description this looks useful. I just hope so.