Dear
I am using the SLG46620 device and the CNT components as counters, I would like to know if the width of the geerated set can be changed or is it by default.
Attached image.
Another question regarding this would be if it is possible to generate a pulse half the width of the one provided as an attachment in image 2.
Thank you
Regards
Device:
Device Number:
SLG46620
Hi danmalper1,
Thanks for your question,
1. The Counters' pulse width is equal 1 period of CNT's clock. The width can be changed by changing the clock frequency. Clock can also be chosen as output from the other counter. Could you explain me want you want to do or provide the timming diagram and I will help you with the design.
2. Could you send me the design file with your project, because I don't understand the issue
Best regards,
Oleh Sapiha
Dear Oleh Sapiha
Thank you for reply. I send you the design and attach my question.
Regards
Daniel
danmalper1,
A quick checking of my understanding: the signal of various duty cycle is applied to input PIN (let's say PIN4). The other input PIN (let's say PIN5) is a selector. Depending on selector (PIN5) we need to divide by 2 the duty cycle or multiply it by 2 and apply it to the output. Am I correct?
If yes, then I have just created the design, I hope it help you to start
Please let me know if my understanding is correct
Best regards,
Oleh Sapiha
Daniel,
I have updated my previous comment, please take a look
Have a nice day!
你好Oleh pokalchuk Sapiha
It is a perfect configuration, but if I want to use in the same chip, it is not possible using CNT2/DLY2, because it is being use conect to ADC.
I am trying use with another CNT, but I am not getting the same result, as those have not UP and Keep connections. Do you know if it is possible using another CNT or other configuration?
再次非常感谢你
Regards
Daniel
Daniel,
I believe, it is impossible to create this functionality without CNT(FSM) block, since you need to store the data(clock) which corresponds to the input pulse width. So the only way to do it is to use CNT(FSM).
By the way, SLG46620 has two CNT(FSM) block, so you can use another one (CNT4 instead of CNT2). CNT4 is 8bit counter and it can also work with ADC
Please let me know if you have any further question about the design or GreenPAK itself
Best regards,
Oleh Sapiha
你好Oleh pokalchuk Sapiha
I have a question about the possibility of modify the model in greenpack and the need to use dff.
Attached below
Thank you
regards
daniel
Dear Daniel,
This DFF is used in another mode, when we need to produce a half of input pulse width, when SEL is equal 0. You are right that we don't need this DFF as well as 3-L0 (MUX) and 2-LUT2, when we need only to double the duty cycle. But they are necessary components for dividing the duty cycle
Best regards,
Oleh Sapiha