Hello Rony, I need to research this a bit more - we don't have simple instructions on using the ADC i'm afraid. Let me provide you what i have now..
BR JE_Dialog
Enabling/disabling of the ADC is triggered by configuringbit GP_ADC_CTRL_REG[GP_ADC_LDO_EN].
After enabling the LDO, a settling time of 20 us isrequired before an AD-conversion can be started.Each conversion has two phases: the sampling phaseand the conversion phase. When bit
GP_ADC_CTRL_REG[GP_ADC_EN] is set to ‘1’, theADC continuously tracks (samples) the selected inputvoltage. Writing a '1' at bitGP_ADC_CTRL_REG[GP_ADC_START] ends the
sampling phase and triggers the conversion phase.When the conversion is ready, the ADC resets bitGP_ADC_START to ‘0’ and returns to the sampling
phase.The conversion itself is fast and takes approximately一个时钟周期16兆赫,though the data handlingwill require several additional clock cycles, depending
on the software code style. The fastest code can handlethe data in four clock cycles of 16 MHz, resulting toa highest sampling rate of 16 MHz/5 = 3.3 Msample/s.
The problem is not with the adc. All I need is to wake up every 100 microsecs and do a measurement. I can't use the app_timer for that because it can't do better than 100hz. Can you send me a piece of code how I setup the timer, the callbacks,etc?
For a 2kHz sampling rate you need to wake up every 500us. For this interval speed it is not possible to use the sleep modes as the wake-up from extended sleep already takes a few milliseconds. Therefore you can use any timer to generate an interrupt at the 500us interval to initiate a conversion cycle.
Hello Rony, I need to research this a bit more - we don't have simple instructions on using the ADC i'm afraid. Let me provide you what i have now..
BR JE_Dialog
Enabling/disabling of the ADC is triggered by configuringbit GP_ADC_CTRL_REG[GP_ADC_LDO_EN].
After enabling the LDO, a settling time of 20 us isrequired before an AD-conversion can be started.Each conversion has two phases: the sampling phaseand the conversion phase. When bit
GP_ADC_CTRL_REG[GP_ADC_EN] is set to ‘1’, theADC continuously tracks (samples) the selected inputvoltage. Writing a '1' at bitGP_ADC_CTRL_REG[GP_ADC_START] ends the
sampling phase and triggers the conversion phase.When the conversion is ready, the ADC resets bitGP_ADC_START to ‘0’ and returns to the sampling
phase.The conversion itself is fast and takes approximately一个时钟周期16兆赫,though the data handlingwill require several additional clock cycles, depending
on the software code style. The fastest code can handlethe data in four clock cycles of 16 MHz, resulting toa highest sampling rate of 16 MHz/5 = 3.3 Msample/s.
The problem is not with the adc.
All I need is to wake up every 100 microsecs and do a measurement.
I can't use the app_timer for that because it can't do better than 100hz.
Can you send me a piece of code how I setup the timer, the callbacks,etc?
Hi Rony,
For a 2kHz sampling rate you need to wake up every 500us. For this interval speed it is not possible to use the sleep modes as the wake-up from extended sleep already takes a few milliseconds. Therefore you can use any timer to generate an interrupt at the 500us interval to initiate a conversion cycle.
Best regards, RvA (dialog)
Hi Rony, a related issue is discussed herehttp://support.dialog-semiconductor.com/ultra-low-power-adc.
Best regards, RvA(Dialog)
Thanks