DA1468x　Hardware Limitation (RF Performance)

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Last post
Fri, 2017-06-02 11:32
#1
Jun-ichi Tobe
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DA1468x　Hardware Limitation (RF Performance)

Hello support!

Would you please check the Limitations related to the RF activity when using the DA1468x?
There seems to be a difference in the description depending on the document.

1) AN - B - 061 "DA1468x Application hardware design guidelines" (Page 15) has the following description.
P1_0和P1_5可能影响radio performance .....
(Package specification is not available.)

2) "Hardware Known Limitations" has the description as follows.
An increased Packet Error rate may be generated certain GPIOs are toggled during RF activity.
.......
AQFN 60: P1.0;
WLCSP: P1.0; P1.5

3) The datasheet (both DA 14680(page 148 and DA 14681(page 152). v 2.1) has the following description.
P1_0, P1_5 and P1_7 might affect radio performance ....

Which description is accurate?
Coulud you please give accurate information for each package?

Regards,

Jun-ichi

Device:
DA1468x
Wed, 2017-06-07 16:41
MT_dialog
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Hi Jun-Ichi Tobe,

Hi Jun-Ichi Tobe,

The pins that affect the radio performance according to the package are:

  • aQFN60: P1.0 has major affect to the radio performance (the pins 1.5 and 1.7 have minor affect to the radio performance if the XTAL16_HPASS_FLT_EN is set to 1 - which is set by the SDK).
  • WLCSP: P1.0 and P1.5 have major affect to the radio performance (the pin 1.7 has minor affect and even less affect since the XTAL16_HPASS_FLT_EN is set to 1).

Thanks MT_dialog

Accepted answer
Thu, 2017-06-08 06:05
Jun-ichi Tobe
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Last seen:6 months 2 weeks ago
Joined:2016-04-01 10:39
Hello MT_dialog,

Hello MT_dialog,
Thank you for your support.
It will be a great help if you let the notation of each document be the same.
regards,
Jun-ichi

星期四,2017-06-08的访谈
(Reply to #3)
MT_dialog
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Hi Jun-ichi Tobe,

Hi Jun-ichi Tobe,

Thanks for the indication, we will make sure to update the datasheet.

Thanks MT_dialog