Booting from serial interfaces: DA1458x connected to SPI Master

Hello,

In the document AN-B-001 §6.1, it is written "The master SPI device generates the SPI clock for the DA1458x. In case of a continuous SPI clock, the frequency of this clock must not be higher than 500 kHz. For an SPI clock frequency higher than 500 kHz, the SPI clock should be paused after each byte."

In the case of a SPI clock frequency higher than 500kHz, what are the timing requirement when you mention "paused after each byte" (i.e. how long do I need to wait)? And, in that case, what is the maximum SPI clock frequency I can use?

Thanks.
Matthieu