Analog GreenPAKs
Upcoming event - Apr 28
5 Configurable Mixed-Signal /Op-Amp circuits to Inspire your next Design
能耗低、小型化和功能onal integration are the main trends in modern consumer electronics. Analog GreenPAK products perfectly accomplish these requirements.
Embedded high performance analog blocks, such as operational amplifiers, can be configured and controlled by customer-defined logic functions to implement various Wake/Sleep scenarios as well as improve the accuracy. All macrocells are packed in one IC to achieve high integration level of common analog and digital components.
Analog GreenPAKs Are Ideal For:
Gas Sensor Analog Front-End
Analog Front-End for Bridge Sensors
Instrumentation Amplifier with Offset and Gain Trim
Tunable Analog Filters
Analog Front-End for Photo Diode
Triangle Wave Generator with Frequency Trim
Button Replacement Using Force-Sensitive Resistor Sensor
Thermal Protection with Trimmable Threshold
Other size/price critical analog circuits
Related links
|
Product |
Description |
亚博国际官网平台网址
|
|---|---|---|
| Configurable mixed-signal IC with operational amplifiers, digital rheostats, EEPROM and a wide set of analog and digital macrocells | Sensor interfaces, programmable gain amplifiers, instrumentation amplifiers, portable and handheld electronics, industrial electronics, home appliances and IoT | |
| Dual channel 375 nA rail-to-rail input/output CMOS operational amplifier | Battery-powered devices, portable devices, wearable products, sensors, medical monitors, smoke detectors, active RFID readers, energy harvesters | |
| Quad channel 375 nA rail-to-rail input/output CMOS operational amplifier | Battery-powered devices, portable devices, wearable products, sensors, medical monitors, smoke detectors, active RFID readers, energy harvesters |
Stay connected
Get in touch with us directly through our worldwide sales offices, or contact one of our global distributors and representatives.
Inquiries Distributors and Representatives Register for newsletters| PN | Special Feature | GPIO | Nominal VDD (V) |
ACMP | DCMP/PWM | Max. CNT/DLY | Max. LUTs | Max. DFF | Pipe Delay |
Progr. DLY | OSC | Com. Interface | Package Size (mm) | Socket | Documents |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| SLG46127 | 2x P-FET | 6 | 1.8 - 5.0 | 2 | - | 4 | 10 | 4 | 8-stage | 1 | RC OSC | - | 1.6 x 2.0 mm | MSTQFN-16 (#1) | Documentation |
| SLG46580 | ASMLDO | 9 | 2.5 - 5.0 | 4 | - | 5 | 16 | 9 | 16-stage | 1 | Conf. OSCLP OSC | I²C | 2.0 x 3.0 mm | STQFN-20 (#3) | Documentation |
| SLG46582 | ASMLDO | 9 | 2.5 - 5.0 | 4 | - | 5 | 16 | 9 | 16-stage | 1 | Conf. OSCLP OSC | I²C | 2.0 x 3.0 mm | STQFN-20 (#3) | Documentation |
| SLG46583 | ASMLDO | 9 | 2.5 - 5.0 | 4 | - | 5 | 16 | 9 | 16-stage | 1 | Conf. OSCLP OSC | I²C | 2.0 x 3.0 mm | STQFN-20 (#3) | Documentation |
| SLG46585 | ASMLDODCDC | 9 | 2.5 - 5.0 | 4 | - | 5 | 16 | 9 | 16-stage | 1 | Conf. OSCLP OSC | I²C | 3.0 x 3.0 mm | MSTQFN-29 (#1) | Documentation |
| SLG46533 | - | 18 | 1.8 - 5.0 | 4 | - | 7 | 25 | 15 | 16-stage | 1 | Conf. OSCRing OSCCrystal OSC | I²C | 2.0 x 2.2 mm 2.0 x 3.0 mm |
MSTQFN-22 (#1)STQFN-20 (#1) | Documentation |
| SLG46538 | ASMDual Supply | 17 | 1.8 - 5.01.8 - VDD1 | 4 | - | 7 | 17 | 8 | 16-stage | 1 | Conf. OSCRC OSCCrystal OSC | I²C | 2.0 x 3.0 mm 2.0 x 2.2 mm |
STQFN-20 (#2)MSTQFN-22 (#2) | Documentation |
| SLG46538-A | ASMDual Supply | 17 | 1.8 - 5.01.8 - VDD1 | 4 | - | 7 | 17 | 8 | 16-stage | 1 | Conf. OSCRC OSCCrystal OSC | I²C | 3.5 x 3.5 mm | TQFN-20 | Documentation |
| SLG46537 | ASM | 18 | 1.8 - 5.0 | 4 | - | 7 | 17 | 8 | 16-stage | 1 | Conf. OSCRC OSCCrystal OSC | I²C | 2.0 x 3.0 mm 2.0 x 2.2 mm |
STQFN-20 (#1)MSTQFN-22 (#1) | Documentation |
| SLG46536 | - | 12 | 1.8 - 5.0 | 3 | - | 7 | 25 | 15 | 16-stage | 1 | Conf. OSCRing OSCCrystal OSC | I²C | 2.0 x 2.2 mm | STQFN-14 (#2) | Documentation |
| SLG46535 | ASMDual Supply | 11 | 1.8 - 5.01.8 - VDD1 | 3 | - | 7 | 17 | 8 | 16-stage | 1 | Conf. OSCRing OSCCrystal OSC | I²C | 2.0 x 2.2 mm | STQFN-14 (#3) | Documentation |
| SLG46534 | ASM | 12 | 1.8 - 5.0 | 3 | - | 7 | 17 | 8 | 16-stage | 1 | Conf. OSCRC OSCCrystal OSC | I²C | 2.0 x 2.2 mm | STQFN-14 (#2) | Documentation |
| SLG46170 | - | 12 | 1.8 - 5.0 | - | - | 8 | 17 | 6 | 16-stage | 1 | RC OSC | - | 2.0 x 2.2 mm | STQFN-14 (#2) | Documentation |
| SLG46169 | - | 12 | 1.8 - 5.0 | 2 | - | 7 | 18 | 6 | 16-stage | 1 | RC OSC | - | 2.0 x 2.2 mm | STQFN-14 (#2) | Documentation |
| SLG46108 | - | 6 | 1.8 - 5.0 | - | - | 4 | 10 | 4 | 8-stage | 1 | RC OSC | - | 1.0 x 1.2 mm | STQFN-8 (#1) | Documentation |
| SLG46121 | Dual Supply | 9 | 1.8 - 5.01.8 - VDD1 | 2 | - | 4 | 16 | 8 | 8-stage | 1 | RC OSC | - | 1.6 x 1.6 mm | STQFN-12 (#2) | Documentation |
| SLG46621 | Dual Supply8-bit ADC | 17 | 1.8 - 5.01.8 - VDD1 | 6 | 3/3 | 10 | 26 | 12 | 16-stage 2 | 2 | LF OSCRing OSCRC OSC | SPI | 2.0 x 3.0 mm | STQFN-20 (#2) | Documentation |
| SLG46620 | 8-bit ADC | 18 | 1.8 - 5.0 | 6 | 3/3 | 10 | 26 | 12 | 16-stage 2 | 2 | LF OSCRing OSCRC OSC | SPI | 2.0 x 3.0 mm 6.5 x 6.4 mm |
STQFN-20 (#1)TSSOP-20 (#1) | Documentation |
| SLG46620-A | 8-bit ADC | 18 | 1.8 - 3.3 | 6 | 3/3 | 10 | 26 | 12 | 16-stage 2 | 2 | LF OSCRing OSCRC OSC | SPI | 6.5 x 6.4 mm | TSSOP-20 (#1) | Documentation |
| SLG46117 | 1x P-FET | 7 | 1.8 - 5.0 | 2 | - | 4 | 10 | 4 | 8-stage | 1 | RC OSC | - | 1.6 x 2.5 mm | STQFN-14 (#1) | Documentation |
| SLG46116 | 1x P-FET | 7 | 1.8 - 5.0 | 2 | - | 4 | 10 | 4 | 8-stage | 1 | RC OSC | - | 1.6 x 2.5 mm | STQFN-14 (#1) | Documentation |
| SLG46140 | 8-bit ADC | 12 | 1.8 - 5.0 | 2 | 3/3 | 4 | 16 | 6 | 16-stage | 1 | LF OSCRing OSCRC OSC | SPI | 1.6 x 2.0 mm | STQFN-14 (#1) | Documentation |
| SLG46120 | - | 10 | 1.8 - 5.0 | 2 | - | 4 | 16 | 8 | 8-stage | 1 | RC OSC | - | 1.6 x 1.6 mm 2.0 x 2.0 mm |
STQFN-12 (#1) | Documentation |
| SLG46110 | - | 8 | 1.8 - 5.0 | 2 | - | 4 | 10 | 4 | 8-stage | 1 | RC OSC | - | 1.6 x 1.6 mm | STQFN-12 (#1) | Documentation |
| SLG46722 | - | 18 | 1.8 - 5.0 | - | - | 8 | 17 | 6 | 16-stage | 1 | RC OSC | - | 2.0 x 3.0 mm | STQFN-20 (#1) | Documentation |
| SLG46721 | - | 18 | 1.8 - 5.0 | 4 | - | 7 | 18 | 6 | 16-stage | 1 | RC OSC | - | 2.0 x 3.0 mm | STQFN-20 (#1) | Documentation |
| SLG46824 | In-System ProgrammabilityDual Supply | 17 | 2.5 - 5.01.8 - VDD1 | 2 | - | 8 | 19 | 17 | 16-stage | 1 | RC OSCLP OSCRing OSC | I²C | 2.0 x 3.0 mm 6.5 x 6.4 mm |
STQFN-20 (#4)TSSOP-20 (#2) | Documentation |
| SLG46826 | In-System ProgrammabilityDual Supply | 17 | 2.5 - 5.01.8 - VDD1 | 4 | - | 8 | 19 | 17 | 16-stage | 1 | RC OSCLP OSCRing OSC | I²C | 2.0 x 3.0 mm 6.5 x 6.4 mm |
STQFN-20 (#4)TSSOP-20 (#2) | Documentation |
| SLG46827-A | In-System DebugDual Supply | 17 | 2.5 - 5.01.8 - VDD1 | 4 | - | 8 | 19 | 17 | 16-stage | 1 | RC OSCLP OSCRing OSC | I²C | 6.5 x 6.4 mm | TSSOP-20 (#2) | Documentation |
| SLG46880 | ASMDual Supply | 28 | 2.5 - 5.02.5 - VDD1 | 4 | - | 5 | 12 | 5 | 16-stage | 1 | RC OSCLP OSCRing OSCCrystal OSC | I²C | 4.0 x 4.0 mm | STQFN-32 (#1) | Documentation |
| SLG46881 | ASMDual Supply | 28 | 2.5 - 5.01.0 - 1.8 | 4 | - | 5 | 12 | 5 | 16-stage | 1 | RC OSCLP OSCRing OSCCrystal OSC | I²C | 4.0 x 4.0 mm | STQFN-32 (#1) | Documentation |
| SLG46517 | ASM2x P-FET | 16 | 1.8 - 5.0 | 4 | - | 7 | 17 | 8 | 16-stage | 1 | RC OSCRing OSCCrystal OSC | I²C | 2.0 x 3.0 mm | MSTQFN-28 (#1) | Documentation |
| SLG46855 | - | 12 | 2.5 - 5.0 | 4 | - | 8 | 23 | 21 | 16-stage | 1 | RC OSCLP OSCRing OSC | I²C | 1.6 x 2.0 mm | STQFN-14 (#1) | Documentation |
| SLG46855-A | - | 12 | 2.5 - 5.0 | 4 | - | 8 | 23 | 21 | 16-stage | 1 | RC OSCLP OSCRing OSC | I²C | 3.0 x 3.0 mm | FCQFN-14 (#1) | Documentation |
| SLG46867 | 2x P-FET | 10 | 2.5 - 5.0 | 4 | - | 8 | 23 | 21 | 16-stage | 1 | RC OSCLP OSCRing OSC | I²C | 1.6 x 3.0 mm | MSTQFN-20 (#1) | Documentation |
| APP亚博娱乐 | Dual Supply4 Half- / 2 Full- bridgesI/V Regulation | 84 x HV | 2.5 - 5.03.3 - 12.0 | 2 | 0/2 | 5 | 17 | 15 | 16-stage | 1 | LP OSCRing OSC | I²C | 2.0 x 3.0 mm | STQFN-20 (#5) | Documentation |
| SLG47004 | Op AmpDigital RheostatAnalog SwitchAuto TrimIn-System Programmability | 8 | 2.5 - 5.0 | 3 | 0/0 | 7 | 20 | 18 | 16-stage | 1 | RC OSCLP OSCRing OSC | I²C | 3.0 x 3.0 mm | STQFN-24 (#1) | Documentation |
| SLG88103 | Op Amp | 0 | 1.8 - 5.0 | 0 | 0/0 | 0 | 0 | 0 | - | 0 | - | - | 2.0 x 2.0 mm | STDFN-10 | Documentation |
| SLG88104 | Op Amp | 0 | 1.8 - 5.0 | 0 | 0/0 | 0 | 0 | 0 | - | 0 | - | - | 2.0 x 3.5 mm | STQFN-20 | Documentation |
| SLG46811 | 92 x 8 bit pattern generator | 10 | 2.5 - 5.0 | 1 (4) | 0/0 | 6 | 18 | 17 | 4 x 8-bit Sh Reg | 1 | Ring OSC LP OSC |
I²C | 1.6 x 1.6 mm | STQFN-12 (#1) | Documentation |
Stay connected
Get in touch with us directly through our worldwide sales offices, or contact one of our global distributors and representatives.
Inquiries Distributors and Representatives Register for newslettersStay connected
Get in touch with us directly through our worldwide sales offices, or contact one of our global distributors and representatives.
Inquiries Distributors and Representatives Register for newsletters
Back to results
2 weeks ago
Simple(I thought) Latch issue
Posted byRenegade_of_Funk10 points 1 replyHello, I need to latch the input of one of my pins on startup and hold that value to be used for a mux control bit. (its flipping a usb c and rerouting a spi bus)
I cant seem to get the latches working right to just hold the initial value and not change when the initial pin used changes states. ie, I want to use a CS line (starts high) to detect a signal location (my other signals are all low)
Is there a clever way to setup the latch so it grabs the initial value then does not change until a power cycle?
I am developing on the SLG46824.
Thank you.
2 weeks ago
Hi,
Thank you for reaching out to us. if you're using a latch with initial polarity high ("1") , the nRST input should be connected to the VDD, otherwise the LATCH may fail to work. Also while testing the design, instead of Emulation mode, please program the chip and use the Test Mode.
Please let me know if you have further questions
Kind Regards
Shivani