测试和物理实验室

测试和物理实验室

关于我们

加速上市时间,对话方式

Leveraging the outsourcing model to its fullest for volume manufacturing, we still retain a prototype test facility, including physical analysis capabilities in-house. This facilitates fast ramping to volume manufacturing at the foundry and at packaging and test sub-contractors, achieving best in class industry yields and extremely high quality and reliable products. Equally important, it allows us to minimize the scope of tests required and the device test time, helping to reduce unit costs.

内部测试设施

在对话框的Kirchheim中,德国制造中心是50平方米,班级1000级洁净室,配备了最先进的晶圆探头测试。我们的测试实验室是完全集成的,真正的混合信号测试环境,具有先进的混合信号Teradyne测试仪,包括IFLEX™和早期Catalyst™测试系统,用于镜像我们的子承包商的测试环境。在这些实验室中,我们的芯片首次在晶圆级测试以测试功能。

首先在内部开发和优化封装部件的测试程序,包括装载板的本地设计(安装在哪些设备进行测试)。通过这种方式,可以将完整和经过验证的测试环境传递给每个设备的子承包商,并且对话框的原型测试中保持相同的环境。

State-of-the-Art Data Processing

我们建立了一个全面且高效的制造数据仓库,可以在线访问提供给客户的所有产品的详细信息。亚博电竞菠菜此外,我们还保留了通过质量门的每个芯片的电气测试数据完整性。这对于易无法解和历史产品调查目的至关重要。

制造软件的专业知识

对话框具有专门的软件开发人员,通过在我们使用的不同类型设备之间创建更智能和更安全的接口,包括在不同类型的设备之间,包括测试仪,探测器,处理程序和操作员接口,这是一支持续改进和自动化的软件开发人员。

Responsible Outsourcing

我们的无晶圆厂业务模式不会阻止我们在我们自己的测试和物理实验室的投资中保留独特的牢固和可靠性。这种方法可确保最快的新设备上市时间,以及大多数无晶圆厂半导体公司只能梦寐以求的客户的技术支持水平。

债券测试

先进,小几何键测试包括金属线拉动试验和线球剪切试验,以确定粘合强度和终极故障机制。物理实验室配备了ESD和闩锁测试能力,允许在人体模型后进行测试,根据JEDEC标准在50V和8KV之间产生脉冲。

Failure Analysis

故障分析的起点是设备识别和对部件历史的检查。1级电气测试之后是非破坏性检查,包括X射线检查和/或声学扫描。然后使用光学显微镜在视觉上进行检测和检查装置。当需要时,进行用扫描电子显微镜(SEM)检查。样品制备在故障分析中起着重要作用,实验室具有能力和必要的设备来制造包装和硅芯片的横截面,以及进行化学和机械模具去处理。

老化

Accelerated ageing can be done at various temperatures (normally 125 degrees Centigrade), having the electrical functionality verified at given time intervals. The standard ageing evaluation is 1000 hours, or some 8 weeks. This enables device performance to be extrapolated out to about 5 years of normal operation, although this can be extended to 17 years using longer test time and/or higher stress temperatures.

Quality Advancement

我们继续投资于我们的物理实验室,赋予对话强大的能力,积极提升其设备的质量和可靠性,提高制造产量。这里的近80%的活动主要集中在评估工作设备并寻找改善它们的方法。帮助客户了解其操作环境中的组件的可能性,即焊接到基板上,是我们物理实验室持续工作的重要组成部分。

Drop Tests

A unique drop test for handheld devices (e.g. mobile phones) has been developed at our lab in Kirchheim that determines the quality of solder joints that attach BGA-packaged devices to printed circuit boards. This kind of information is fed back to sub-contract manufacturers enabling them to improve their processes and it is used to assist our customers in attaining their own quality goals. Compared to the JEDEC standard, which specifies an acceleration of 1500G, Dialog’s drop test evaluates what happens at accelerations up to 7500G. After being dropped, the package of the device under test is assessed as a measure of soldering quality.

镜像包装

Substrate and packaging design are also carried out in Kirchheim, where we offers a broad range of packaging options to customers for consumer, industrial and automotive applications.

推动质量的进步

Product testing is a manufacturing cost, so reducing test time and performing multi-site testing is a key target. Dramatic improvements are experienced between early batches, with yields rising from 75% to 98% or higher by the time the product is in volume production. The test time is dramatically reduced during this process and the cycle time to create this improvement can be as short as 1 to 3 weeks – an achievement that only comes as a result of investment in in-house facilities.

我们的Kirchheim制造网站的Teradyne的原型测试人员能够处理高达250件触点的先进包装技术。它们将快速吞吐量与准确,可靠的结果相结合。我们的测试子承包商使用等效的测试人员,确保整个测试程序的一致性,无论在世界都在何处进行。