1术语和定义
DFF | D-Flipflop |
GPIO. | 通用输入/输出 |
琵琶 | Parallel in parallel out |
PISO | 序列出来并行 |
SIPO | Serial in parallel out |
SISO | Serial in serial out |
2参考文献
对于相关的文件和软件,请访问:
https://www.dialog-semicondoduments.c亚博电竞菠菜om/products/greenpak..
下载我们的Free GreenPak™Designer软件[1]打开.gp文件[2]并查看所提出的电路设计。使用GreenPak开发工具[3]在几分钟内将设计冻结到您自己的定制IC中。yabo国际娱乐对话框半导体提供完整的应用程序库注意[4],其中包含了设计示例以及对话框IC中的功能和块的说明。
- GreenPak Designer软件,软件下载和用户指南,对话框半导体yabo国际娱乐
- AN-CM-303,8位Siso,SIPO,PISO,PIPO SHIFT寄存器.GP,GreenPak设计文件,对话半导体yabo国际娱乐
- GreenPak开发工具,GreenPak开发工具网页,对话框半导体yabo国际娱乐
- GreenPak应用笔记,GreenPak应用笔记网页,对话框半导体yabo国际娱乐
- SLG46533, Datasheet, Dialog Semiconductor
Author: Priyatham Rao Valipe
3 Introduction
寄存器是用触发器制作的顺序电路来存储和传输二进制信息。Shift寄存器主要使用D菊花链结构中的D触发器进行。这些触发器可以每个存储一位二进制信息,所有这些都由共享输入时钟控制。DFF可以在时钟的每个上升沿读取并存储输入信号的值。DFF的此属性可用于构建各种寄存器。不同形式的SISO,SIPO,PISO,PIPO等寄存器通过加载和检索的方式来区分。
本应用笔记中显示的实现包括8位移位寄存器,该寄存器与GreenPak SLG46533 IC设计了[5]。移位寄存器中的比特数对应于存在的触发器数量;在本设计中,使用八个DFF。
4 SISO移位寄存器
SISO is one of the most basic forms of the shift registers. The data is loaded serially and retrieved serially. The output of the first DFF is fed into the input of the next DFF at each clock cycle, eventually reaching the last DFF / Output. This Shift register output is delayed from the input. The shift register shifts, or streams, one-bit data per clock cycle.
如上所述所示,DFF3被串行输入数据位,并且输出从DFF10串行取出。所有DFF都共享相同的时钟。NRESET设置为高,以确保启用所有DFF进行正常操作。
The timing diagram shown below has clock and input data stream as first and second waveforms. The rest of the waveforms show how the output of each DFF shifts serially. If we consider the first 8 input bits which are 10011010, we can clearly observe that these 8 bits appear one after another by the 8th rising edge clock at the output of DFF10
One of the main applications of the SISO register is to act as a delay element. The delay can be controlled by the number of stages in the register and the frequency of the clock. In the design below the clock is at 1kHz, so the delay that is observed is 7 ms.
5 SIPO移位寄存器
In this type of shift register, the data is sent serially and retrieved in parallel. All the DFF's are clocked by the same clock and nReset is used to ensure that all the DFF's are enabled for normal operation. The data is fed serially into DFF3. All the parallel outputs are from the outputs of the DFF that are present in the shift register. The output of each intermediate DFF is fed as input to the next DFF. All 8 input serial bits will be available at the parallel outputs after 8 rising edges of the clock.
The timing diagram of the SIPO shift register is shown in Fig 4. It has a clock and Serial Data-in as the first two waveforms, and all other waveforms are the outputs of the DFF's. It can be observed that after the 8th rising edge of the clock, the entire input data bits are visible at the output of each DFF.
在最后一个DFF的输出处观察到串行传输的第一位。SIPO移位寄存器的主要应用是许多数字应用中的数据转换。亚博国际官网平台网址有时,当需要更多GPIO引脚时,SIPO移位寄存器连接到微处理器的输出。在上述设计中,时钟频率为1 kHz,将8个串行位转换为平行位的时间是8 ms。
The correspondence between input to output is shown below:
6 PISO移位寄存器
PISO移位寄存器是SIPO移位寄存器的逆转录。输入并行地呈现输入,并串联检索输出。每个时钟周期都取出数据。在该移位寄存器中的主要点是注意的,即在移位寄存器中加载数据时不需要时钟,而需要卸载数据。
与其他换档寄存器类似,所有DFF都以相同的时钟计时,并且具有NRESET为正常操作设置为高电平。IC中提供的2位查找表用作或栅极,为DFF提供并行输入,也可以将一个DFF的输出传输为下一个DFF的输入。从DFF10的输出串行检索输出。
This type of shift register is typically used for data conversion from parallel to serial. All the parallel bits with the data are serially transmitted to the single input of a microprocessor which helps in using fewer input pins of the microprocessor.
The timing diagram shown in Fig. 6 depicts the clock and all parallel inputs, highlighted between two vertical orange lines. The last waveform is the serial data out which shows how all the parallel inputs are converted into a serial bitstream.
The way how inputs correspond to output is shown below.
7 Pipo Shift寄存器
This shift register is the converse of the SISO shift register. The input data is given and retrieved in parallel. The output changes with respect to the input within the same clock cycle. Similar to the PISO shift register, a clock is not required to load data into the flipflops, but to latch and transfer out. Hence a PIPO shift register can be used as a temporary storage device, though in practice other GreenPAK capabilities are often included within the design. Whenever new data output is required, a rising edge clock presents the DFF content to the output. One note about this shift register is that there is no connection between individual DFFs. Similar to other shift registers, the same clock and nReset are applied to all the DFF's.
Pipo移位寄存器的时序图如图8所示。由于所有输入和输出都是单独加载和卸载的,因此它会显示大量波形。波形中的黄色突出显示线分离输入和输出。所有顶部波形都是输入,底部波形是输出的。它从波形清晰可见,即可以通过单个时钟脉冲检索加载的数据。
8 GreenPAK Cost Advantage
GreenPak SLG46533 IC是一款非常多功能的GreenPak IC。许多应用程亚博国际官网平台网址序已通过此IC实施。表1显示了一些可用于移位寄存器应用程序的竞争IC。亚博国际官网平台网址
Table 1: Comparison of Other ICs Available in Market
IC |
数量 |
价格 |
Package/Size |
---|---|---|---|
TPIC6C596PWR. |
1 |
$ 1.10 |
TSSOP(16) 5.00 mm×4.40 mm |
MM74HC595MX |
1 |
0.58美元 |
TSSOP(16) 5.00 mm x 4.40 mm |
SN74HC595. |
1 |
$ 0.95 |
TSSOP(16) 5.00 mm×4.40 mm |
注意1 ICs的所有价格re referred from Digi-Key on 08-05-2020.
GreenPak SLG46533 IC的大小为2.00 mm x 3.00 mm,成本低于0.50美元。GreenPak IC是市场上可用的最佳解决方案清晰可见。此外,用户可以控制GreenPak中IC的配置,从而增加其值。
9 Conclusions
Shift registers are an integral part of any digital system. In this application note, four types of shift registers, SISO, SIPO, PISO, PIPO have been configured within the GreenPAK SLG46533 IC. The 8-bit shift registers in this application note form a viable alternative to other shift registers available on the market. The GreenPAK SLG46533 IC has the advantage of low PCB area footprint, more circuitry available, and lower cost.